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STV3550 데이터시트(PDF) 78 Page - STMicroelectronics |
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STV3550 데이터시트(HTML) 78 Page - STMicroelectronics |
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78 / 144 page ![]() 78/144 STV3550 CPU and System Management Functional Description 6.3.11.4 Mixed Configuration with two SDRAM Devices This configuration is able to implement low-cost and high-end solutions on the same printed circuit board as described in previous sections. This configuration is dedicated for the development of universal TV chassis boards that suit several types of hardware and software applications. It can also be used for a development board. This configuration requires two SDRAM footprints with 16 data lines each. One SDRAM device is connected to the upper half of the data bus, while the other device is connected to the lower half. The Flash memory shares the lower half of the data bus with one of the SDRAM devices. Figure 50: High-End Configuration using 2 SDRAM Devices ADDR[19:0] DATA[15:0] CS OE WE A[11:0] DQ[15:0] CS RAS CAS FLASH 16Mb WE DQM[1:0] SDRAM 64Mb STV3550 NOT_CS_FLASH ADDR[19:0] FLASH_D[15:0] NOT_RAS NOT_CAS RD_NOT_WR NOT_BE[1:0] CKOUT_SDRAM SDRAM_D[15:0] NOT_CS_SDRAM [19:0] [12:1] [15:0] CLK BA[1:0] [16:15] CKEN CKIN_SDRAM [19:18] A[11:0] DQ[15:0] CS RAS CAS WE DQM[1:0] SDRAM 64Mb CLK BA[1:0] CKEN [12:1] [16:15] LSBs of Data MSBs of Data [19:0] |
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