SLG46721 datasheet(69/101 Pages) DIALOG

69 / 101 page

000-0046721-114

Page 68 of 100

SLG46721

13.4 CNT/DLY4 Register Settings

13.5 CNT/DLY5 Register Settings

Table 62. CNT/DLY4 Register Settings

Signal Function

Address

Counter/Delay4

Mode Select

reg<753>

0: Delay Mode

1: Counter Mode

Counter/Delay4

Clock Source Select

(external clock is

only for counter

mode)

reg<756:754>

000: Internal OSC Clock

001: OSC/4

010: OSC/12

011: OSC/24

100: OSC/64

101: External Clock

110: Reserved

111: Reserved

Counter4 Control

Data/Delay4 Time

Control

reg<764:757>

1-256: (delay time = (counter control data +2) /freq)

Delay4 Mode Select

reg<766:765>

00: Delay on both falling and rising edges

01: Delay on falling edge only

10: Delay on rising edge only

11: No delay on either falling or rising edges

Table 63. CNT/DLY5 Register Settings

Signal Function

Address

Counter/Delay5

Mode Select

reg<767>

0: Delay Mode

1: Counter Mode

Counter/Delay5

Clock Source Select

(external clock is

only for counter

mode)

reg<770:768>

000: Internal OSC Clock

001: OSC/4

010: OSC/12

011: OSC/24

100: OSC/64

101: External Clock

110: Reserved

111: Counter4 Overflow

Counter5 Control

Data/Delay5 Time

Control

reg<778:771>

1-256: (delay time = (counter control data +2) /freq)

Delay5 Mode Select

reg<780:779>

00: Delay on both falling and rising edges

01: Delay on falling edge only

10: Delay on rising edge only

11: No delay on either falling or rising edges

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