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SLG46721 데이터시트(PDF) 2 Page - Dialog Semiconductor |
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SLG46721 데이터시트(HTML) 2 Page - Dialog Semiconductor |
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2 / 101 page ![]() 000-0046721-114 Page 1 of 100 SLG46721 1.0 Overview The SLG46721 provides a small, low power component for commonly used mixed-signal functions. The user creates their circuit design by programming the one time Non-Volatile Memory (NVM) to configure the interconnect logic, the I/O Pins and the macrocells of the SLG46721. This highly versatile device allows a wide variety of mixed-signal functions to be designed within a very small, low power single integrated circuit. The macrocells in the device include the following: • Four Analog Comparators (ACMP) • Two Voltage References (Vref) • Nine Combinatorial Look Up Tables (LUTs) • Two 2-bit LUTs • Seven 3-bit LUTs • Nine Combination Function Macrocells • Four Selectable DFF/Latch or 2-bit LUTs • Two Selectable DFF/Latch or 3-bit LUTs • One Selectable Pipe Delay or 3-bit LUT • Two Selectable CNT/DLY or 4-bit LUTs • Five Counter / Delay Generators (CNT/DLY) • One 14-bit delay/counter • One 14-bit delay/counter with external clock/reset • Three 8-bit delays/counters • Pipe Delay – 16 stage/3 output (Part of Combination Function Macrocell) • Programmable Delay • Additional Logic Functions • Two Inverters • Two Deglitch Filters • RC Oscillator (RC OSC) |
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