DSP56857 datasheet(276/662 Pages) FREESCALE

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External I/O Signals

5685X Digital Signal Controller User Manual, Rev. 4

11-6

Freescale Semiconductor

When an SPI is configured as a slave, the SS pin is always configured as an input. The MODFEN

bit can prevent the state of the SS from creating a MODF error.

Note:

A Logic 1 voltage on the SS pin of a slave SPI puts the MISO pin in a high-impedance

state. The slave SPI ignores all incoming SCLK clocks, even if it was already in the

middle of a transmission. A Mode Fault will occur if the SS pin changes state during a

transmission.

When a SPI is configured as a master, the SS input can be used in conjunction with the MODF

flag to prevent multiple masters from driving MOSI and SCLK. For the state of the SS pin to set

the MODF flag, the MODFEN bit in the SCLK register must be set.

11.5 External I/O Signals

There are four external SPI pins. All are summarized in Table 11-2.

Table 11-1. SPI I/O Configuration

SPE

SPMSTR

MODFEN

SPI Configuration

State of SS Logic

1. X = Don’t care

Not Enabled

SS ignored by SPI

Slave

Input-only to SPI

Master without MODF

SS ignored by SPI

Master with MODF

Input-only to SPI

Table 11-2. External I/O Signals

Signal Name

Description

Direction

MOSI

Master-Out Slave-In Pad Pin

Bi-Directional

MISO

Master-In Slave-Out Pad Pin

Bi-Directional

SCLK

Slack Clock Pad Pin

Bi-Directional

Slave Select Pad Pin (Active Low)

Input

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