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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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DSP56857 데이터시트(PDF) 516 Page - Freescale Semiconductor, Inc |
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DSP56857 데이터시트(HTML) 516 Page - Freescale Semiconductor, Inc |
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516 / 662 page  Application: Date: Programmer: Sheet C 5685X Digital Signal Controller User Manual, Rev. 4 B-14 Freescale Semiconductor 1 of 4 Bits Name Description 13 LCK1 Lock 1 Status This bit shows the status of the lock detector state for the LCK1 circuit. 0 PLL not locked 1 PLL locked 12 LCK0 Lock 0 Status This bit shows the status of the lock detector state for the LCK0 circuit. 0 PLL not locked 1 PLL locked 11 SEL Clock Source Select This bit is used to control the source of the master clock to the SIM. 0 Oscillator output selected (default) 1 PLL output selected 6 - 5 LCK1_IE Lock 1 Interrupt Enable This is an optional interrupt bit. 00 Disable interrupt (default) 01 Enable interrupt on rising edge of LCK1 10 Enable interrupt on falling edge of LCK1 11 Enable interrupt on any edge of LCK1 OCCS CGM Control Register (CGMCR) CGM Control Register (CGMCR) $1FFF10 + $0 Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read 0 0 LCK1 LCK0 SEL 0 0 0 0 LCK1_IE LCK0_IE LCKON TOD_SEL PDN Write Reset 00 0 0 0 000000 0 0 0 0 1 denotes Reserved Bits See the following page for continuation of this register |
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