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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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DSP56857 데이터시트(PDF) 581 Page - Freescale Semiconductor, Inc |
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DSP56857 데이터시트(HTML) 581 Page - Freescale Semiconductor, Inc |
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581 / 662 page  Application: Date: Programmer: Sheet C 56F853/854/855/857/858 Digital Signal Controller User Manual, Rev. 4 B-79 Freescale Semiconductor Preliminary 12 of 16 ESSI Time Slot Register (STSR) ESSI Time Slot Register (STSR) Base + $A Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read Write DUMMY REGISTER, WRITTEN DURING INACTIVE TIME SLOTS (NETWORK MODE) Reset xxxx xxxx xxxx xxxx denotes Reserved Bits ESSI Bits Name Description 15 - 0 STSR ISSI Time Slot Register Used when data is not to be transmitted in an available transmit time slot. The time slot register is a write-only register behaving like an alternative transmit data register, except instead of transmitting data, the STD pin signal is tri-stated. Using this register is important in avoiding overflow/underflow during inactive time slots. |
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