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V62/13624-01XE-R 데이터시트(PDF) 23 Page - Texas Instruments |
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V62/13624-01XE-R 데이터시트(HTML) 23 Page - Texas Instruments |
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23 / 77 page ![]() 23 MSP430F2132-EP www.ti.com SLAS913A – JULY 2013 – REVISED AUGUST 2013 Product Folder Links: MSP430F2132-EP Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated (1) XIN only in bypass mode 5.6 Schmitt-Trigger Inputs (Ports P1, P2, P3, JTAG, RST/NMI, XIN (1)) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT VIT+ Positive-going input threshold voltage 0.45 VCC 0.75 VCC V 2.2 V 0.95 1.70 3 V 1.30 2.30 VIT- Negative-going input threshold voltage 0.25 VCC 0.55 VCC V 2.2 V 0.50 1.25 3 V 0.70 1.70 Vhys Input voltage hysteresis (VIT+ - VIT- ) 2.2 V 0.15 1.05 V 3 V 0.25 1.05 RPull Pullup/pulldown resistor For pullup: VIN = VSS, For pulldown: VIN = VCC 19 35 52 kΩ CI Input capacitance VIN = VSS or VCC 5 pF (1) An external signal sets the interrupt flag every time the minimum interrupt pulse duration t(int) is met. It may be set with trigger signals shorter than t(int). 5.7 Inputs (Ports P1, P2) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT t(int) External interrupt timing Port P1, P2: P1.x to P2.x, External trigger pulse duration to set interrupt flag(1) 2.2 V, 3 V 20 ns (1) The leakage current is measured with VSS or VCC applied to the corresponding pin(s), unless otherwise noted. (2) The leakage of the digital port pins is measured individually. The port pin is selected for input and the pullup or pulldown resistor is disabled. 5.8 Leakage Current (Ports P1, P2, P3) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT Ilkg(Px.y) High-impedance leakage current (1) (2) 2.2 V, 3 V ±51 nA |
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