V62SLASH13624-01XE-R datasheet(11/77 Pages) TI1

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MSP430F2132-EP

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SLAS913A – JULY 2013 – REVISED AUGUST 2013

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4.6 Memory Organization

Table 8. Memory Organization

MSP430F2112

MSP430F2122

MSP430F2132

Memory

Size

2 KB

4 KB

8 KB

Main: interrupt vector

Flash

0xFFFF to 0xFFC0

Main: code memory

Flash

0xFFFF to 0xF800

0xFFFF to 0xF000

0xFFFF to 0xE000

Information memory

Size

256 Byte

Flash

0x10FFh to 0x1000

Boot memory

Size

1 KB

ROM

0x0FFF to 0x0C00

RAM

Size

256 B

512 Byte

0x02FF to 0x0200

0x03FF to 0x0200

Peripherals

16-bit

0x01FF to 0x0100

8-bit

0x00FF to 0x0010

8-bit SFR

0x000F to 0x0000

4.7 Bootstrap Loader (BSL)

The MSP430F2132 bootstrap loader (BSL) enables users to program the flash memory or RAM using a UART

serial interface. Access to the MSP430F2132 memory via the BSL is protected by user-defined password. For

complete description of the features of the BSL and its implementation, see the MSP430 Programming Via the

Bootstrap Loader User’s Guide (SLAU319).

Table 9. BSL Function Pins

BSL FUNCTION

PW PACKAGE PINS

RHB, RTV PACKAGE PINS

Data transmit

22 - P1.1

Data receive

10 - P2.2

8 - P2.2

4.8 Flash Memory

The flash memory can be programmed via the JTAG port, the bootstrap loader, or in-system by the CPU. The

CPU can perform single-byte and single-word writes to the flash memory. Features of the flash memory include:

•

Flash memory has n segments of main memory and four segments of information memory (A to D) of

64 bytes each. Each segment in main memory is 512 bytes in size.

•

Segments 0 to n may be erased in one step, or each segment may be individually erased.

•

Segments A to D can be erased individually, or as a group with segments 0 to n.

Segments A to D are also called information memory.

•

Segment A contains calibration data. After reset, segment A is protected against programming and erasing. It

can be unlocked, but care should be taken not to erase this segment if the device-specific calibration data is

required.

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