NM1282KSLAXAL datasheet(86/120 Pages) NANYA

86 / 120 page

Version 1.3

Nanya Technology Corp.

06/2018

2Gb SLC NAND + 2Gb LPDDR2

NM1282KSLAXAL

NTC Proprietary

Level: Property

Active power-down standby current with clock stop:

CK=LOW,

 =HIGH;

CKE is LOW;

 is HIGH;

One bank/RB active;

CA bus inputs are STABLE;

Data bus inputs are STABLE

IDD3PS1

VDD1

IDD3PS2

VDD2

IDD3PS,in

VDDCA,VDDQ

1,4

Active non power-down standby current:

tCK = tCK(avg)min;

CKE is HIGH;

 is HIGH;

One bank/RB active;

CA bus inputs are SWITCHING;

Data bus inputs are STABLE

IDD3N1

VDD1

IDD3N2

VDD2

IDD3N,in

VDDCA,VDDQ

1,4

Active non power-down standby current with clock stop:

CK=LOW,

 =HIGH;

CKE is HIGH;

 is HIGH;

One bank/RB active;

CA bus inputs are STABLE;

Data bus inputs are STABLE

IDD3NS1

VDD1

IDD3NS2

VDD2

IDD3NS,in

VDDCA,VDDQ

1,4

Operating burst read current:

tCK = tCK(avg)min;

 is HIGH between valid commands;

One bank/RB active;

BL = 4; RL = RLmin;

CA bus inputs are SWITCHING;

50% data change each burst transf

IDD4R1

VDD1

IDD4R2

VDD2

IDD4R,in

VDDCA

IDD4RQ

VDDQ

1,4

Operating burst write current:

tCK = tCK(avg)min;

 is HIGH between valid commands;

One bank/RB active;

BL = 4; WL = WLmin;

CA bus inputs are SWITCHING;

50% data change each burst transfer

IDD4W1

VDD1

IDD4W2

VDD2

IDD4W,in

VDDCA,VDDQ

1,4

All Bank Refresh Burst current:

tCK = tCK(avg)min;

CKE is HIGH between valid commands;

tRC = tRFCabmin;

Burst refresh;

CA bus inputs are SWITCHING;

Data bus inputs are STABLE;

IDD51

VDD1

IDD52

VDD2

IDD5IN

VDDCA,VDDQ

1,4

All Bank Refresh Average current:

tCK = tCK(avg)min;

IDD5AB1

VDD1

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