NM1282KSLAXAL datasheet(24/120 Pages) NANYA

24 / 120 page

Version 1.3

Nanya Technology Corp.

06/2018

2Gb SLC NAND + 2Gb LPDDR2

NM1282KSLAXAL

NTC Proprietary

Level: Property

(3) Notes

(a) Internal addressing in relation with the Districts

To use Multi Page Read operation, the internal addressing should be considered in relation with the District.

• The device consists from 2 Districts.

• Each District consists from 1024 erase blocks.

• The allocation rule is follows.

District 0: Block 0, Block 2, Block 4, Block 6,···, Block 2046

District 1: Block 1, Block 3, Block 5, Block 7,···, Block 2047

(b) Address input restriction for the Multi Page Read operation

There are following restrictions in using Multi Page Read;

(Restriction)

Maximum one block should be selected from each District.

Same page address (PA0 to PA5) within two districts has to be selected.

For example;

(60) [District 0, Page Address 0x00000] (60) [District 1, Page Address 0x00040] (30)

(60) [District 0, Page Address 0x00001] (60) [District 1, Page Address 0x00041] (30)

(Acceptance)

There is no order limitation of the District for the address input.

For example, following operation is accepted;

(60) [District 0] (60) [District 1] (30)

(60) [District 1] (60) [District 0] (30)

It requires no mutual address relation between the selected blocks from each District.

Make sure  is held to High level when Multi Page Read operation is performed

NM1282KSLAXAL 데이터시트(PDF) 24 Page - Nanya Technology Corporation.