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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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STM8S 데이터시트(PDF) 205 Page - STMicroelectronics |
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STM8S 데이터시트(HTML) 205 Page - STMicroelectronics |
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205 / 467 page  DocID14587 Rev 14 205/467 RM0016 16-bit advanced control timer (TIM1) 261 17.7.13 Capture/compare enable register 1 (TIM1_CCER1) Address offset: 0x0C Reset value: 0x00 7 654 3210 CC2NP CC2NE CC2P CC2E CC1NP CC1NE CC1P CC1E rw rw rw rw rw rw rw rw Bit 7 CC2NP: Capture/compare 2 complementary output polarity Refer to CC1NP description. Bit 6 CC2NE: Capture/compare 2 complementary output enable Refer to CC1NE description. Bit 5 CC2P: Capture/compare 2 output polarity Refer to CC1P description. Bit 4 CC2E: Capture/compare 2 output enable Refer to CC1E description. Bit 3 CC1NP: Capture/compare 1 complementary output polarity 0: OC1N active high 1: OC1N active low Note: This bit is no longer writable while LOCK level 2 or 3 have been programmed (LOCK bits in TIM1_BKR register) and CC1S = 00 (the channel is configured in output). On channels that have a complementary output, this bit is preloaded. If the CCPC bit is set in the TIM1_CR2 register, the CC1NP active bit takes the new value from the preload bit only when a COM is generated. |
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