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STM8S 데이터시트(PDF) 284 Page - STMicroelectronics |
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STM8S 데이터시트(HTML) 284 Page - STMicroelectronics |
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284 / 467 page ![]() Serial peripheral interface (SPI) RM0016 284/467 DocID14587 Rev 14 20.4.3 SPI interrupt control register (SPI_ICR) Address offset: 0x02 Reset value: 0x00 7 654 3210 TXIE RXIE ERRIE WKIE Reserved rw rw rw rw r Bit 7 TXIE: Tx buffer empty interrupt enable 0: TXE interrupt masked 1: TXE interrupt not masked. This allows an interrupt request to be generated when the TXE flag is set. Bit 6 RXIE: RX buffer not empty interrupt enable 0: RXNE interrupt masked 1: RXNE interrupt not masked. This allows an interrupt request to be generated when the RXNE flag is set. Bit 5 ERRIE: Error interrupt enable 0: Error interrupt is masked 1: Error interrupt is enabled. This allows an interrupt request to be generated when an error condition occurs (CRCERR, OVR, MODF) Bit 4 WKIE: Wakeup interrupt enable 0: Wakeup interrupt masked 1: Wakeup interrupt enabled. This allows an interrupt request to be generated when the WKUP flag is set. Bits 3:0 Reserved |
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