| 전자부품 데이터시트 검색엔진 |
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XRT83SL34 데이터시트(PDF) 30 Page - Exar Corporation |
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XRT83SL34 데이터시트(HTML) 30 Page - Exar Corporation |
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30 / 80 page ![]() XRT83SL34 QUAD T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR REV. P1.0.8 PRELIMINARY 27 If the internal termination mode (RXTSEL = “1”) is selected, the effective impedance for E1, T1 or J1 can be achieved either with an internal resistor or a combination of internal and external resistors as shown in Table 7. NOTE: In Hardware mode, pins RXRES[1:0] control all channels. FIGURE 11. SIMPLIFIED DIAGRAM FOR THE INTERNAL RECEIVE AND TRANSMIT TERMINATION MODE T1 TTIP TRING 5 8 1:2 75 Ω , 100 Ω 110 Ω or 120 Ω 4 1 0.68 µ F R int R int TTIP TRING TX Line Driver T2 RTIP RRING 1 4 1:1 8 5 RTIP RRIN G RX Equilizer R int Channel _n TPO S TN EG TC LK RPOS RNEG RC LK 75 Ω , 100 Ω 110 Ω or 120 Ω |
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