STM32F722IC datasheet(154/229 Pages) STMICROELECTRONICS

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Electrical characteristics

STM32F722xx STM32F723xx

154/229

DS11853 Rev 6

6.3.21

NRST pin characteristics

The NRST pin input driver uses CMOS technology. It is connected to a permanent pull-up

resistor, RPU (see Table 61: I/O static characteristics).

Unless otherwise specified, the parameters given in Table 64 are derived from tests

performed under the ambient temperature and VDD supply voltage conditions summarized

in Table 16.

Figure 47. Recommended NRST pin protection

1. The reset network protects the device against parasitic resets. 0.1 uF capacitor must be placed as close as

possible to the chip.

2. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in

Table 64. Otherwise the reset is not taken into account by the device.

Table 64. NRST pin characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

RPU

Weak pull-up equivalent resistor(1)

VIN = VSS

VF(NRST)(2) NRST Input filtered pulse

100

VNF(NRST)(2) NRST Input not filtered pulse

VDD > 2.7 V

300

TNRST_OUT Generated reset pulse duration

Internal Reset source

µs

1. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution to the series

resistance must be minimum

(~10% order)

2. Guaranteed by design.

ai14132c

STM32F

RPU

NRST(2)

VDD

Filter

Internal Reset

0.1 μF

External

reset circuit (1)

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