STM32F722IC datasheet(155/229 Pages) STMICROELECTRONICS

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DS11853 Rev 6

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STM32F722xx STM32F723xx

Electrical characteristics

201

6.3.22

TIM timer characteristics

The parameters given in Table 65 are guaranteed by design.

Refer to Section 6.3.20: I/O port characteristics for details on the input/output alternate

function characteristics (output compare, input capture, external clock, PWM output).

6.3.23

RTC characteristics

6.3.24

12-bit ADC characteristics

Unless otherwise specified, the parameters given in Table 67 are derived from tests

performed under the ambient temperature, fPCLK2 frequency and VDDA supply voltage

conditions summarized in Table 16.

Table 65. TIMx characteristics(1)(2)

1. TIMx is used as a general term to refer to the TIM1 to TIM12 timers.

2. Guaranteed by design.

Symbol

Parameter

Conditions(3)

3. The maximum timer frequency on APB1 or APB2 is up to 216 MHz, by setting the TIMPRE bit in the

RCC_DCKCFGR register, if APBx prescaler is 1 or 2 or 4, then TIMxCLK = HCLK, otherwise TIMxCLK =

4x PCLKx.

Min

Max

Unit

tres(TIM)

Timer resolution time

AHB/APBx prescaler=1

or 2 or 4, fTIMxCLK =

216 MHz

tTIMxCLK

AHB/APBx

prescaler>4, fTIMxCLK =

108 MHz

tTIMxCLK

fEXT

Timer external clock

frequency on CH1 to CH4 f

TIMxCLK = 216 MHz

fTIMxCLK/2

MHz

ResTIM

Timer resolution

16/32

bit

tMAX_COUNT

Maximum possible count

with 32-bit counter

65536 ×

65536

tTIMxCLK

Table 66. RTC characteristics

Symbol

Parameter

Conditions

Min

Max

-fPCLK1/RTCCLK frequency ratio

Any read/write operation

from/to an RTC register

Table 67. ADC characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VDDA

Power supply

VDDA − VREF+ < 1.2 V

1.7(1)

-3.6

VREF+

Positive reference voltage

1.7(1)

-VDDA

VREF-

Negative reference voltage

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