STM32F722IC datasheet(159/229 Pages) STMICROELECTRONICS

159 / 229 page

DS11853 Rev 6

159/229

STM32F722xx STM32F723xx

Electrical characteristics

201

Figure 48. ADC accuracy characteristics

1. See also Table 69.

2. Example of an actual transfer curve.

3. Ideal transfer curve.

4. End point correlation line.

5. ET = Total Unadjusted Error: maximum deviation between the actual and the ideal transfer curves.

EO = Offset Error: deviation between the first actual transition and the first ideal one.

EG = Gain Error: deviation between the last ideal transition and the last actual one.

ED = Differential Linearity Error: maximum deviation between actual steps and the ideal one.

EL = Integral Linearity Error: maximum deviation between any actual transition and the end point

correlation line.

Figure 49. Typical connection diagram using the ADC

1. Refer to Table 67 for the values of RAIN, RADC and CADC.

2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the

pad capacitance (roughly 5 pF). A high Cparasitic value downgrades conversion accuracy. To remedy this,

fADC should be reduced.

ai14395c

1L SBIDEAL

4095

4094

4093

456

4093 4094 4095 4096

(1)

(2)

(3)

VDDA

VSSA

V REF+

4096

(or

depending on package)]

V DDA

4096

[1LSB IDEAL=

ai17534

STM32F

VDD

AINx

IL±1 μA

0.6 V

RAIN(1)

Cparasitic

VAIN

0.6 V

RADC(1)

CADC(1)

12-bit

converter

Sample and hold ADC

converter

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