TMS28F033 datasheet(5/52 Pages) TI

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TMS28F033

4194304-BIT

SYNCHRONOUS FLASH MEMORY

SMJS833 – NOVEMBER 1997

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

Terminal Functions (Continued)

TERMINAL

DESCRIPTION

NAME

TYPE†

DESCRIPTION

VPP

Write/erase power supply. VPP is the 12-V power supply for the write/erase operations.

VDDI

Internal power supply. VDDI is the 5-V power supply for the internal logic.

VDDE

External power supply. VDDE is the 3.3-V/5-V power supply for the inputs and outputs.

VSSE

Output ground. VSSE is the ground for the outputs DQ0 – DQ31, RY/BY, and QV.

VSSI

Input ground. VSSI is the ground for both the inputs and internal logic.

No connect. These pins are left unconnected inside the memory chip.

† I = input, O = output, OD = open drain, S = power supply

architecture

The TMS28F033 uses a blocked architecture to allow independent erasure of selected memory blocks. The

block to be erased is selected by using any valid address within the block. Figure 1 and Figure 2 show the

memory maps for the two configurations.

main memory

The TMS28F033 main memory is configurable to either three blocks (DCR5 = 0) or four blocks (DCR5 = 1), see

Table 1, and Figure 1 and Figure 2.

Address

Range

x16 Configuration

A–1 is LSB

Address

Range

x32 Configuration

A0 is LSB

3FFFFh

Block 2

1FFFFh

Block 2

30000h

Block 2

64K Addresses

18000h

Block 2

32K Addresses

2FFFFh

Block 1

17FFFh

Block 1

08000h

Block 1

160K Addresses

04000h

Block 1

80K Addresses

07FFFh

k 0

03FFFh

k 0

02FFFh

00000h

Overlay Block

12K Addresses

Block 0

32K Addresses

017FFh

00000h

Overlay Block

6K Addresses

Block 0

16K Addresses

Figure 1. TMS28F033 With Three-Block Main-Array Memory Map (DCR5 = 0)

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