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UPD17P136ACT 데이터시트(PDF) 61 Page - NEC |
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UPD17P136ACT 데이터시트(HTML) 61 Page - NEC |
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61 / 292 page ![]() CHAPTER 7 SYSTEM REGISTER (SYSREG) 42 Figure 7-2. System Register Configuration Note This bit is fixed to 0 in the case of the µPD17134A and µPD17135A. 74H 75H 76H 77H 78H 79H 7AH 7BH 7CH 7DH 7EH 7FH IXH IXM MPH MPL AR3 AR2 AR1 AR0 WR BANK Symbol Address Window register (WR) Bank register (BANK) Address register (AR) General register pointer (RP) Program status word (PSWORD) IXL RPH RPL PSW Data memory row address pointer (MP) Index register (IX) Name Bit M P E B C D C M P C Y Z I X E 00000 000 000 000 Data b3 b2 b1 b0 (IX) (RP) (BANK) (MP) (AR) 00000 0000000000 Undefined 0000000000000000000000000000 Initial value when reset 0 Note b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 b3 b2 b1 b0 |
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