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UPD17P136ACT 데이터시트(PDF) 76 Page - NEC |
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UPD17P136ACT 데이터시트(HTML) 76 Page - NEC |
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76 / 292 page ![]() CHAPTER 7 SYSTEM REGISTER (SYSREG) 57 7.6 GENERAL REGISTER POINTER (RP) 7.6.1 General Register Pointer Configuration Figure 7-15 shows the configuration of the general register pointer. Figure 7-15. General Register Pointer Configuration As shown in Figure 7-15, the general register pointer consists of seven bits; four bits in system register address 7DH (RPH) and the high-order 3 bits of system register address 7EH (RPL). However, since the high-order 3 bits of address 7DH are always set to 0, the register effectively consists of four bits; the least significant bit of address 7DH and the high-order 3 bits of address 7EH. All register bits are cleared to 0 at reset. b3 b2 b1 b0 b3 b2 b1 b0 0 0 000 RPL RPH 7EH 7DH Address Name Symbol Bit Data Initial value when reset (RP) General register pointer (RP) B C D Flag |
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