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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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UPD17P136ACT 데이터시트(PDF) 91 Page - NEC |
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UPD17P136ACT 데이터시트(HTML) 91 Page - NEC |
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91 / 292 page  CHAPTER 9 REGISTER FILE (RF) 72 Figure 9-3. Accessing the Register File Using the PEEK and POKE Instructions 9.3 CONTROL REGISTER Figure 9-4 shows the configuration of the control register. As shown in Figure 9-4, the control register consists of 64 nibbles (64 ! 4 bits) allocated in register file addresses 00H to 3FH. However, only 26 nibbles are actually used. The remaining 38 nibbles are allocated for registers which have not yet been implemented. Data should not be read from or written to this area. There are two types of registers, both of which occupy one nibble of memory. One type is read/write (R/W), and the other is read-only (R). Note that within the read/write (R/W) flags, there exists a flag that will always be read as 0. The following read/write (R/W) flags are those flags which will always be read as 0: WR 0123456789 A B C D E F 0 1 2 3 4 5 6 7 0 3 1 2 3 4 5 6 7 BANK0 3 PEEK WR, RF53 8 POKE RF72, WR 7 PEEK WR, RF70 4 POKE RF6D, WR BANK1 Unmounted System register 1 POKE RF1F, WR Control register Register file for BANK0 Register file for BANK1 Column address Data memory 5 2 6 PEEK WR, RF02 |
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