STM32H723VG datasheet(172/227 Pages) STMICROELECTRONICS

172 / 227 page

Electrical characteristics

STM32H723xE/G

172/227

DS13313 Rev 2

2. In buffered mode, the output can overshoot above the final value for low input code (starting from the minimum value).

3. Refer to Table 50: I/O static characteristics.

4. TON is the refresh phase duration, while TOFF is the hold phase duration. Refer to the product reference manual for more

details.

Table 86. DAC accuracy(1)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

DNL

Differential non

linearity(2)

DAC output buffer ON

−2-

LSB

DAC output buffer OFF

−2-

Monotonicity

10 bits

INL

Integral non linearity(3)

DAC output buffer ON, CL ≤ 50 pF,

RL ≥ 5 ㏀

−4-

LSB

DAC output buffer OFF,

CL ≤ 50 pF, no RL

−4-

Offset

Offset error at code

0x800 (3)

DAC output

buffer ON,

CL ≤ 50 pF,

RL ≥ 5 ㏀

VREF+ = 3.6 V

±12

LSB

VREF+ = 1.8 V

±25

DAC output buffer OFF,

CL ≤ 50 pF, no RL

±8

Offset1

Offset error at code

0x001(4)

DAC output buffer OFF,

CL ≤ 50 pF, no RL

±5

LSB

OffsetCal

Offset error at code

0x800 after factory

calibration

DAC output

buffer ON,

CL ≤ 50 pF,

RL ≥ 5 ㏀

VREF+ = 3.6 V

±5

LSB

VREF+ = 1.8 V

±7

Gain

Gain error(5)

DAC output buffer ON,CL ≤ 50 pF,

RL ≥ 5 ㏀

±1

DAC output buffer OFF,

CL ≤ 50 pF, no RL

±1

TUE

Total unadjusted error

DAC output buffer ON, CL ≤ 50 pF,

RL ≥ 5 ㏀

±30

LSB

DAC output buffer OFF, CL ≤

50 pF, no RL

±12

TUECal

Total unadjusted error

after calibration

DAC output buffer ON, CL ≤ 50 pF,

RL ≥ 5 ㏀

±23

SNR

Signal-to-noise ratio(6)

DAC output buffer ON,CL ≤ 50 pF,

RL ≥ 5 ㏀ , 1 kHz, BW = 500 KHz

67.8

DAC output buffer OFF,

CL ≤ 50 pF, no RL,1 kHz, BW =

500 KHz

67.8

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