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Z8F082ASH020SC 데이터시트(PDF) 196 Page - Zilog, Inc.

부품명 Z8F082ASH020SC
상세설명  Z8 Encore XP-R F08xA Series with eXtended Peripherals
PDF  244 Pages
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제조업체  ZILOG [Zilog, Inc.]
홈페이지  http://www.zilog.com
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Z8F082ASH020SC 데이터시트(HTML) 196 Page - Zilog, Inc.

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PS024705-0405
P R E L I M I N A R Y
eZ8 CPU Instruction Set
Z8 Encore! XP® F08xA Series
Product Specification
178
eZ8 CPU Instruction Summary
Table 116 summarizes the eZ8 CPU instructions. The table identifies the addressing
modes employed by the instruction, the effect upon the Flags register, the number of CPU
clock cycles required for the instruction fetch, and the number of CPU clock cycles
required for the instruction execution.
.
SRL
dst
Shift Right Logical
SWAP
dst
Swap Nibbles
Table 116. eZ8 CPU Instruction Summary
Assembly
Mnemonic
Symbolic Operation
Address Mode
Opcode(s)
(Hex)
Flags
Fetch
Cycles
Instr.
Cycles
dst
src
C
Z
S
V
D
H
ADC dst, src
dst
← dst + src + C
r
r
12
*
***0
*
2
3
rIr
13
2
4
RR
14
3
3
RIR
15
3
4
RIM
16
3
3
IR
IM
17
3
4
ADCX dst, src
dst
← dst + src + C
ER
ER
18
*
***0
*
4
3
ER
IM
19
4
3
ADD dst, src
dst
← dst + src
r
r
02
*
***0
*
2
3
rIr
03
2
4
RR
04
3
3
RIR
05
3
4
RIM
06
3
3
IR
IM
07
3
4
ADDX dst, src
dst
← dst + src
ER
ER
08
*
***0
*
4
3
ER
IM
09
4
3
Flags Notation:
* = Value is a function of the result of the operation.
– = Unaffected
X = Undefined
0 = Reset to 0
1 = Set to 1
Table 115. Rotate and Shift Instructions
Mnemonic
Operands
Instruction



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