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Z8F082ASH020SC 데이터시트(PDF) 58 Page - Zilog, Inc.

부품명 Z8F082ASH020SC
상세설명  Z8 Encore XP-R F08xA Series with eXtended Peripherals
PDF  244 Pages
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제조업체  ZILOG [Zilog, Inc.]
홈페이지  http://www.zilog.com
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Z8F082ASH020SC 데이터시트(HTML) 58 Page - Zilog, Inc.

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PS024705-0405
P R E L I M I N A R Y
General-Purpose I/O
Z8 Encore! XP® F08xA Series
Product Specification
40
1 = The alternate function selected through Alternate Function Set sub-registers is
enabled. Port pin operation is controlled by the alternate function.
Port A–D Output Control Sub-Registers
The Port A–D Output Control sub-register (Table 20) is accessed through the Port A–D
Control register by writing 03H to the Port A–D Address register. Setting the bits in the
Port A–D Output Control sub-registers to 1 configures the specified port pins for open-
drain operation. These sub-registers affect the pins directly and, as a result, alternate func-
tions are also affected.
POC[7:0]—Port Output Control
These bits function independently of the alternate function bit and always disable the
drains if set to 1.
0 = The drains are enabled for any output mode (unless overridden by the alternate func-
tion).
1 = The drain of the associated pin is disabled (open-drain mode).
Port A–D High Drive Enable Sub-Registers
The Port A–D High Drive Enable sub-register (Table 21) is accessed through the Port
A–D Control register by writing 04H to the Port A–D Address register. Setting the bits in
the Port A–D High Drive Enable sub-registers to 1 configures the specified port pins for
high current output drive operation. The Port A–D High Drive Enable sub-register affects
the pins directly and, as a result, alternate functions are also affected.
Table 20. Port A–D Output Control Sub-Registers (PxOC)
BITS
7
6
5
4
3
2
1
0
FIELD
POC7
POC6
POC5
POC4
POC3
POC2
POC1
POC0
RESET
0
000
00
00
R/W
R/WR/W
R/WR/W
R/WR/W
R/WR/W
ADDR
If 03H in Port A–D Address Register, accessible through the Port A–D Control Register
Table 21. Port A–D High Drive Enable Sub-Registers (PxHDE)
BITS
7
6
5
4
3
2
1
0
FIELD
PHDE7
PHDE6
PHDE5
PHDE4
PHDE3
PHDE2
PHDE1
PHDE0
RESET
0
000
00
00
R/W
R/WR/W
R/WR/W
R/WR/W
R/WR/W
ADDR
If 04H in Port A–D Address Register, accessible through the Port A–D Control Register



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