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Z8F082ASH020SC 데이터시트(PDF) 215 Page - Zilog, Inc.

부품명 Z8F082ASH020SC
상세설명  Z8 Encore XP-R F08xA Series with eXtended Peripherals
PDF  244 Pages
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제조업체  ZILOG [Zilog, Inc.]
홈페이지  http://www.zilog.com
Logo ZILOG - Zilog, Inc.

Z8F082ASH020SC 데이터시트(HTML) 215 Page - Zilog, Inc.

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PS024705-0405
P R E L I M I N A R Y
Electrical Characteristics
Z8 Encore! XP® F08xA Series
Product Specification
197
Table 124. Analog-to-Digital Converter Electrical Characteristics and Timing
Symbol
Parameter
VDD = 2.7 to 3.6V
TA = -40°C to +105°C
Units
Conditions
Minimum
Typical
Maximum
Resolution
–
10
–
bits
External VREF = 3.0V;
RS ← 3.0KΩ
Differential Nonlinearity
(DNL)
-1.0
–
1.0
LSB
External VREF = 3.0V;
RS ← 3.0KΩ
Integral Nonlinearity (INL)
-3.0
–
3.0
LSB
External VREF = 3.0V;
RS ← 3.0KΩ
Uncalibrated DC Offset
Error (single-ended)
-100
TBD
-250
–80
TBD
250
mV
Unbuffered Mode
Unity Gain Buffered
20x Gain Buffered
Note: All values are
uncompensated;
manual offset
compensation is
available
Uncalibrated DC Offset
Error (differential)
-100
TBD
–80
TBD
mV
Unbuffered Mode
Unity Gain Buffered
Note: All values are
uncompensated;
manual offset
compensation is
available
VREF
Internal Reference Voltage
0.9
1.8
1.0
2.0
1.1
2.2
V
REFSEL=00
REFSEL=01
Single-Shot Conversion
Time
–
5129
–
cycles System clock cycles
Continuous Conversion
Time
–
256
–
cycles System clock cycles
Sampling Rate
System Clock /256
Hz
Signal Input Bandwidth
–
10
KHz
As defined by -3dB
point
RS
Analog Source Impedance
–
–
10
500
k
Ω
In unbuffered mode
In buffered modes
1 Analog source impedance affects the ADC offset voltage (because of pin leakage) and input settling
time.



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