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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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STM32F730V8 데이터시트(PDF) 125 Page - STMicroelectronics |
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STM32F730V8 데이터시트(HTML) 125 Page - STMicroelectronics |
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125 / 202 page  DS12536 Rev 2 125/202 STM32F730x8 Electrical characteristics 185 An amplitude quantization error may be generated because the linear modulation profile is obtained by taking the quantized values (rounded to the nearest integer) of MODPER and INCSTEP. As a result, the achieved modulation depth is quantized. The percentage quantized modulation depth is given by the following formula: As a result: Figure 34 and Figure 35 show the main PLL output clock waveforms in center spread and down spread modes, where: F0 is fPLL_OUT nominal. Tmode is the modulation period. md is the modulation depth. Figure 34. PLL output clock waveforms in center spread mode Figure 35. PLL output clock waveforms in down spread mode mdquantized% MODEPER INCSTEP × 100 × 5 × () 2 15 1 – () PLLN × () ⁄ = mdquantized% 250 126 × 100 × 5 × () 2 15 1 – () 240 × () ⁄ 2.002%(peak) == Frequency (PLL_OUT) Time F0 tmode 2xtmode md ai17291 md Frequency (PLL_OUT) Time F0 tmode 2xtmode 2xmd ai17292b |
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