STM32WLE4JC datasheet(47/146 Pages) STMICROELECTRONICS

47 / 146 page

DS13105 Rev 9

47/146

STM32WLE5/E4xx

Functional overview

The USART interface can be served by the DMA controller.

3.29

Low-power universal asynchronous receiver transmitter

(LPUART)

The devices embed one low-power UART (LPUART1) that enables asynchronous serial

communication with minimum power consumption. The LPUART supports half-duplex

single-wire communication and modem operations (CTS/RTS), allowing multiprocessor

communication.

The LPUART has a clock domain independent from the CPU clock, and can wake up the

system from Stop mode using baudrates up to 220 Kbaud. The wakeup events from Stop

mode are programmable and can be one of the following:

•

start bit detection

•

any received data frame

•

a specific programmed data frame

Only a 32.768 kHz clock (LSE) is needed to allow LPUART communication up to

9600 baud. Therefore, even in Stop mode, the LPUART can wait for an incoming frame

while having an extremely low-energy consumption. Higher speed clock can be used to

reach higher baudrates.

The LPUART interface can be served by the DMA controller.

Table 16. USART/LPUART features

USART modes/features(1)

1. X = supported.

USART1/2

LPUART1

Hardware flow control for modem

Continuous communication using DMA

Multiprocessor communication

Synchronous mode (Master/Slave)

Smartcard mode

Single-wire half-duplex communication

IrDA SIR ENDEC block

LIN mode

Dual clock domain and wakeup from low-power mode

Receiver timeout interrupt

Modbus communication

Auto baud rate detection

Driver enable

USART data length

7, 8 and 9 bits

Tx/Rx FIFO

Tx/Rx FIFO size

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