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STM32WLE4JC 데이터시트(PDF) 132 Page - STMicroelectronics |
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STM32WLE4JC 데이터시트(HTML) 132 Page - STMicroelectronics |
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132 / 146 page ![]() Electrical characteristics STM32WLE5/E4xx 132/146 DS13105 Rev 9 Figure 28. SPI timing diagram - Slave mode and CPHA = 1 1. Measurement points are set at CMOS levels: 0.3 VDD and 0.7 VDD. Figure 29. SPI timing diagram - Master mode 1. Measurement points are set at CMOS levels: 0.3 VDD and 0.7 VDD. ai14135b NSS input tSU(NSS) tc(SCK) th(NSS) CPHA=1 CPOL=0 CPHA=1 CPOL=1 tw(SCKH) tw(SCKL) ta(SO) tv(SO) th(SO) tr(SCK) tf(SCK) tdis(SO) MISO OUTPUT MOSI INPUT tsu(SI) th(SI) MSB OUT MSB IN BIT6 OUT LSB OUT LSB IN BIT 1 IN ai14136c CPHA= 0 MOSI OUTPUT MISO INP UT CPHA= 0 LSB OUT LSB IN CPOL=0 CPOL=1 B I T1 OUT NSS input tc(SCK) tw(SCKH) tw(SCKL) tr(SCK) tf(SCK) th(MI) High CPHA=1 CPHA=1 CPOL=0 CPOL=1 tsu(MI) tv(MO) th(MO) MSB IN BIT6 IN MSB OUT |
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