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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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SPC572L60F2 데이터시트(PDF) 75 Page - STMicroelectronics |
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SPC572L60F2 데이터시트(HTML) 75 Page - STMicroelectronics |
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75 / 112 page  DocID027866 Rev 5 75/112 SPC572Lx Electrical characteristics 111 Figure 25. Nexus TDI/TDIC, TMS/TMSC, TDO/TDOC timing 3.17.2 DSPI timing with CMOS and LVDS(a) pads DSPI channel frequency support is shown in Table 40. Timing specifications are shown in Table 41, Table 42 and Table 43. a. DSPI in TSB mode with LVDS pads can be used to implement Micro Second Channel bus protocol. TCK 11 12 15 TMS/TMSC, TDO/TDOC 13 14 16 TDI/TDIC Table 40. DSPI channel frequency support DSPI use mode Max usable frequency (MHz)(1),(2) CMOS (Master mode) Full duplex – Classic timing (Table 41)17 Full duplex – Modified timing (Table 42)30 Output only mode (SCK/SOUT/PCS) (Table 41 and Table 42)30 Output only mode TSB mode (SCK/SOUT/PCS) (Table 44)30 LVDS (Master mode) Output only mode TSB mode (SCK/SOUT/PCS) (Table 43)40 1. Maximum usable frequency can be achieved if used with fastest configuration of the highest drive pads. |
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