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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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SPC572L60F2 데이터시트(PDF) 84 Page - STMicroelectronics |
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SPC572L60F2 데이터시트(HTML) 84 Page - STMicroelectronics |
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84 / 112 page  Electrical characteristics SPC572Lx 84/112 DocID027866 Rev 5 Table 44. DSPI CMOS master timing – output only – timed serial bus mode TSB = 1 or ITSB = 1, CPOL = 0 or 1, continuous SCK clock(1)(2) # Symbol C Characteristic Condition Value(3) Unit Pad drive(4) Load (CL)Min Max 1tSCK CC D SCK cycle time SCK drive strength Very strong 25 pF 33.0 — ns Strong 50 pF 80.0 — ns Medium 50 pF 200.0 — ns 2tCSV CC D PCS valid after SCK(5) SCK and PCS drive strength Very strong 25 pF 16 —ns Strong 50 pF 16 —ns Medium 50 pF 26 —ns PCS medium and SCK strong PCS = 50 pF SCK = 50 pF 38 —ns 3tCSH CC D PCS hold after SCK(5) SCK and PCS drive strength Very strong PCS = 0 pF SCK = 50 pF –14 —ns Strong PCS = 0 pF SCK = 50 pF –14 —ns Medium PCS = 0 pF SCK = 50 pF –33 —ns PCS medium and SCK strong PCS = 0 pF SCK = 50 pF –35 —ns 4tSDC CC D SCK duty cycle(6) SCK drive strength Very strong 0pF 1/2tSCK –2 1/2tSCK +2 ns Strong 0pF 1/2tSCK –2 1/2tSCK +2 ns Medium 0pF 1/2tSCK –5 1/2tSCK +5 ns SOUT data valid time (after SCK edge) 9tSUO CC D SOUT data valid time from SCK CPHA = 1(7) SOUT and SCK drive strength Very strong 25 pF — 7.0 ns Strong 50 pF — 9.0 ns Medium 50 pF — 25.0 ns SOUT data hold time (after SCK edge) 10 tHO CC D SOUT data hold time after SCK CPHA = 1(7) SOUT and SCK drive strength Very strong 25 pF –7.7 — ns Strong 50 pF –11.0 — ns Medium 50 pF –15.0 — ns 1. TSB = 1 or ITSB = 1 automatically selects MTFE = 1 and CPHA = 1. 2. All output timing is worst case and includes the mismatching of rise and fall times of the output pads. |
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