STM32WB50CG datasheet(89/119 Pages) STMICROELECTRONICS

89 / 119 page

DS13047 Rev 5

89/119

STM32WB50CG STM32WB30CE

Electrical characteristics

110

Prequalification trials

Most of the common failures (unexpected reset and program counter corruption) can be

reproduced by manually forcing a low state on the NRST pin or the Oscillator pins for

1 second.

To complete these trials, ESD stress can be applied directly on the device, over the range of

specification values. When unexpected behavior is detected, the software can be hardened

to prevent unrecoverable errors occurring (see application note AN1015).

Electromagnetic Interference (EMI)

The electromagnetic field emitted by the device are monitored while a simple application is

executed (toggling two LEDs through the I/O ports). This emission test is compliant with the

IEC 61967-2 standard, which specifies the test board and the pin loading.

6.3.15

Electrical sensitivity characteristics

Based on three different tests (ESD, LU) using specific measurement methods, the device is

stressed to determine its performance in terms of electrical sensitivity.

Electrostatic discharge (ESD)

Electrostatic discharges (a positive then a negative pulse separated by 1 second) are

applied to the pins of each sample according to each pin combination. The sample size

depends on the number of supply pins in the device (3 parts × (n+1) supply pins). This test

conforms to the ANSI/JEDEC standard.

Table 61. EMI characteristics

Symbol

Parameter

Conditions

Monitored

frequency band

Peripheral ON

[fHSE / fCPUM4, fCPUM0]

Unit

32 MHz / 64 MHz, 32 MHz

SEMI

Peak level

VDD = 3.6 V, TA = 25 °C,

compliant with IEC 61967-2

0.1 MHz to 30 MHz

dBµV

30 MHz to 130 MHz

130 MHz to 1 GHz

1 GHz to 2 GHz

EMI level

1.5

Table 62. ESD absolute maximum ratings

Symbol

Ratings

Conditions

Class

Maximum

value(1)

Unit

VESD(HBM)

Electrostatic discharge voltage

(human body model)

TA = +25 °C, conforming to

ANSI/ESDA/JEDEC JS-001

2000

VESD(CDM)

Electrostatic discharge voltage

(charge device model)

TA = +25 °C, conforming to

ANSI/ESD STM5.3.1 JS-002

C2a

500

1. Guaranteed by characterization results.

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