MSP430 datasheet(62/88 Pages) TI

62 / 88 page

7.6.1.16 AIN1_THRESHOLD Register (Offset = 13h) [Reset = FF00h]

Return to the Register Map.

Table 7-27. AIN1_THRESHOLD Register Field Descriptions

Bit

Field

Type

Reset

Description

15-8

R/W

FFh

High Threshold for Channel AIN1 {[11:4],4b1111}

This value is compared (>) against AIN1 data bits[11:0].

7-0

R/W

Low Threshold for Channel AIN1 {[11:4],4b0000}

This value is compared (<) against AIN1 data bits[11:0].

7.6.1.17 TEMP_THRESHOLD Register (Offset = 14h) [Reset = FF00h]

Return to the Register Map.

Table 7-28. TEMP_THRESHOLD Register Field Descriptions

Bit

Field

Type

Reset

Description

15-8

R/W

FFh

High Threshold for Channel TEMP {[11:4],4b1111}

This value is compared (>) against TEMP data bits[11:0].

7-0

R/W

Low Threshold for Channel TEMP {[11:4],4b0000}

This value is compared (<) against TEMP data bits[11:0].

7.6.1.18 UBM Register (Offset = 16h) [Reset = 0000h]

Return to the Register Map.

Table 7-29. UBM Register Field Descriptions

Bit

Field

Type

Reset

Description

15-1

RESERVED

REG_MODE

R/W

Configure the rest of the Register Map to be accessed by UART

break mode (UBM) or SPI. This register can only be written by the

UART Break communication.

0h = SPI Mode (default)

1h = UART Break Mode

AFE78101, AFE88101

SLASF21 – DECEMBER 2022

www.ti.com

Submit Document Feedback

Product Folder Links: AFE78101 AFE88101

MSP430 데이터시트(PDF) 62 Page - Texas Instruments

MSP430 데이터시트(HTML) 62 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88

데이터시트 다운로드

링크 URL