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MSP430 데이터시트(PDF) 15 Page - Texas Instruments |
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MSP430 데이터시트(HTML) 15 Page - Texas Instruments |
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15 / 88 page ![]() 6.8 Typical Characteristics: VOUT DAC (continued) at TA = 25°C, PVDD = VDD = IOVDD = 1.8 V, external or internal VREFIO = 1.25 V, RLOAD = 50 kΩ to GND, CLOAD = 100 pF to GND, and digital inputs at IOVDD or GND (unless otherwise noted) Figure 6-21. DAC Settling Time vs Load (Rising Voltage Step) Figure 6-22. DAC Settling Time vs Load (Falling Voltage Step) Figure 6-23. DAC Settling Time With Linear Slew Rate Control Figure 6-24. DAC Settling Time With Sinusoidal Slew Rate Control Figure 6-25. DAC Glitch Impulse Rising Edge Figure 6-26. DAC Glitch Impulse Falling Edge www.ti.com AFE78101, AFE88101 SLASF21 – DECEMBER 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 15 Product Folder Links: AFE78101 AFE88101 |
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