HC05V7GRSSLASHD datasheet(151/170 Pages) NXP

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SECTION 16: INSTRUCTION SET

Page 137

MC68HC05V7 Specification Rev. 1.0

16.6.7

INDEXED, 16-BIT OFFSET

In the indexed, 16-bit offset addressing mode, the effective address is the sum of the

contents of the unsigned 8-bit index register and the two unsigned bytes following the

opcode. This address mode can be used in a manner similar to indexed, 8-bit offset except

that this 3-byte instruction allows tables to be anywhere in memory. As with direct and

extended addressing, the Motorola assembler determines the shortest form of indexed

addressing.

16.6.8

BIT SET/CLEAR

In the bit set/clear addressing mode, the bit to be set or cleared is part of the opcode, and

the byte following the opcode specifies the direct address of the byte in which the specified

bit is to be set or cleared. Any read/write register bit in the first 256 locations of memory,

including I/O, can be selectively set or cleared with a single 2-byte instruction.

16.6.9

BIT TEST AND BRANCH

The bit test and branch addressing mode is a combination of direct addressing and relative

addressing. The bit that is to be tested and its condition (set or clear), is included in the

opcode. The address of the byte to be tested is in the single byte immediately following the

opcode byte. The signed relative 8-bit offset in the third byte is added to the PC if the

specified bit is set or cleared in the specified memory location. This single 3-byte instruction

allows the program to branch based on the condition of any readable bit in the first 256

locations of memory. The span of branching is from -128 to +127 from the address of the

next opcode. The state of the tested bit is also transferred to the carry bit of the condition

code register.

16.6.10

INHERENT

In the inherent addressing mode, all the information necessary to execute the instruction is

contained in the opcode. Operations specifying only the index register and/or accumulator

as well as the control instructions with no other arguments are included in this mode. These

instructions are 1 byte long.

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