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VNF1048F 데이터시트(PDF) 37 Page - STMicroelectronics

부품명 VNF1048F
상세설명  High-side switch Controller with intelligent fuse protection for 12 V, 24 V and 48 V automotive applications
PDF  52 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
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VNF1048F 데이터시트(HTML) 37 Page - STMicroelectronics

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Table 39. SR#2: Status Register 2; Address 12h (ID 14.2)
Bit
Default
Name
Description
Access
23 ÷ 15
unused
14 ÷ 2 0000000000000 CURR_SENSE
13 bit ADC conversion related to Current Sense Amplifier, ranging
from 0 V to 160 mV; unidirectional current through an external sense
resistor.
R
1
0
UPDT_CURR
Updated status bit. This bit is set when value is updated and cleared
when register is read.
R
0
Parity Bit
ODD Parity Bit Check
Table 40. SR#3: Status Register 3; Address 13h (ID 14.3)
Bit
Default
Name
Description
Access
23
unused
22 ÷ 13 0000000000
TJ
10 bit ADC conversion related to TJ (Device temperature)
R
12
0
UPDT_TJ
Updated status bit. This bit is set when value is updated and cleared when
register is read.
R
11 ÷ 2 0000000000
NTC
10 bit ADC conversion related to NTC (External MOSFET temperature sensing
through an external NTC resistor)
R
1
0
UPDT_NTC
Updated status bit. This bit is set when value is updated and cleared when
register is read.
R
0
Parity Bit
ODD Parity Bit Check
Table 41. SR#4: Status Register 4; Address 14h (ID 14.4)
Bit
Default
Name
Description
Access
23 ÷ 12
unused
22 ÷ 13 0000000000
VDS
10 bit ADC conversion of the voltage across HS switch (VS-OUT).
This register is not refreshed during VDS Self-Test execution.
R
12
0
UPDT_VDS
Updated status bit. This bit is set when value is updated and cleared when
register is read.
R
11 ÷ 2 0000000000
VOUT
10 bit ADC conversion of the OUT pin
R
1
0
UPDT_VOUT
Updated status bit. This bit is set when value is updated and cleared when
register is read.
R
0
Parity Bit
ODD Parity Bit Check
Table 42. SR#5: Status Register 5; Address 15h (ID 14.5)
Bit
Default
Name
Description
Access
23 ÷ 14
unused
13
S_T_VDS_MAX1
This bit is set if VDS_THR is reached during VDS self-test.
R/C
12 ÷ 3 0000000000
S_T_VDS
Difference between 10 bit ADC conversion of the VDS, performed
during VDS self-test and content of VDS register latched during self-
test execution.
R/C
2 ÷ 1
00
S_T_VDS_STATUS
Status of VDS self-test
00: IDLE: Self-test not started
01: RUN: Self-test execution in progress
R/C
VNF1048F
Status registers
DS13084 - Rev 6
page 37/52



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