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P9221-R3 데이터시트(PDF) 35 Page - Renesas Technology Corp |
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P9221-R3 데이터시트(HTML) 35 Page - Renesas Technology Corp |
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35 / 46 page ![]() P9221-R3 Datasheet © 2017 Integrated Device Technology, Inc. 35 October 20, 2017 Address and Bit Register or Bit Field Name R/W Default Function and Description 0056HEX [1] Clear_Over_Voltage_Bit RW 0BIN “1” clears the INT_VRECT_OV_Status bit in register 0036HEX. Register 0036HEX is updated after the application processor resets the interrupt pin by writing “1” to bit 5 of register 004EHEX. 0056HEX [0] Clear_Over_Current_Bit RW 0BIN “1” clears the INT_OC_Limit_Status bit in register 0036HEX. Register 0036HEX is updated after the application processor resets the interrupt pin by writing “1” to bit 5 of register 004EHEX. Table 28. Incoming User Data Registers Address and Bit Register or Bit Field Name R/W Default Function and Description 0058HEX Incoming_User_Data 0 RW 00HEX The application processor reads this register to get the data P9221-R3 received from the P9242-R3. 0059HEX Incoming_User_Data 1 RW 00HEX The application processor reads this register to get the data P9221-R3 received from the P9242-R3. Table 29. Data Header Register Address and Bit Register or Bit Field Name R/W Default Function and Description 0088HEX Data_Header_Register RW 00HEX The application processor sets this register to following values: 18HEX = when sending 1 byte of user data 28HEX = when sending 2 bytes of user data 38HEX = when sending 3 byte of user data 48HEX = when sending 4 bytes of user data 58HEX = when sending 5 bytes of user data 68HEX = when sending 6 bytes of user data 78HEX = when sending 7 bytes of user data 84HEX = when sending 8 bytes of user data |
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