HC05RC16GRSSLASHD datasheet(72/122 Pages) NXP

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Carrier Modulator Transmitter (CMT)

General Release Specification

MC68HC05RC16 — Rev. 3.0

Carrier Modulator Transmitter (CMT)

9.4.2 Carrier Generator Data Registers (CHR1, CLR1, CHR2, and CLR2)

The carrier generator contains two, 7-bit data registers: primary high

time (CHR1), primary low time (CLR1); and two, 6-bit data registers:

secondary high time (CHR2) and secondary low time (CLR2). Bit 7 of

CHR1 and CHR2 is used to read and write the IRO latch.

Address:

$0010

Bit 7

654321

Bit 0

Read:

IROLN

PH5

PH4

PH3

PH2

PH1

PH0

Write:

Reset:

UUUUUU

U = Unaffected

Figure 9-3. Carrier Generator Data Register CHR1

Address:

$0011

Bit 7

654321

Bit 0

Read:

IROLP

PL5

PL4

PL3

PL2

PL1

PL0

Write:

Reset:

UUUUUU

U = Unaffected

Figure 9-4. Carrier Generator Data Register CLR1

Address:

$0012

Bit 7

654321

Bit 0

Read:

SH5

SH4

SH3

SH2

SH1

SH0

Write:

Reset:

UUUUUU

U = Unaffected

Figure 9-5. Carrier Generator Data Register CHR2

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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