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TMPR4955AF 데이터시트(PDF) 113 Page - Toshiba Semiconductor |
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TMPR4955AF 데이터시트(HTML) 113 Page - Toshiba Semiconductor |
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113 / 168 page ![]() Chapter 6 TX4955A System Interface 6-41 ExtAgent Cmd ExtAgent Data Proc Cmd Proc Data C B A PMaster* SysCmd SysAD SCycle SClock Figure 6.3.5 Sample Cycle with PMaster* Asserted A External agent drives SysAD and SysCmd buses (external agent is master). B SysAD and SysCmd buses are set to a tri-state (no bus master). CPMaster PMaster PMaster PMaster* is asserted. Processor drives SysAD and SysCmd buses (processor is master). EValid EValid EValid EValid* (I), PValid (I), PValid (I), PValid (I), PValid* (O) (O) (O) (O) During a cycle in which either signal is asserted, the signal indicates a new valid address or valid data is on the SysAD bus, and a new valid command or data identifier is on the SysCmd bus. EValid EValid EValid EValid* indicates an external agent is driving new SysAD and SysCmd values. PValid PValid PValid PValid* indicates the processor is driving new SysAD and SysCmd values. Data A SysAD SCycle SClock Cmd SysCmd EValid or PValid Figure 6.3.6 Sample Cycle with PValid* and EValid* A: New SysAD and SysCmd values. Each cycle either of these signals remains asserted indicates there is a new SysAD and SysCmd value. Data Data B A SysAD SCycle SClock Cmd Cmd SysCmd EValid* or PValid* Figure 6.3.7 Sample Cycles with Multiple PValid* and EValid* A New SysAD and SysCmd value. B Another new SysAd and SysCmd value. |
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