MC68340 datasheet(245/441 Pages) FREESCALE

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MC68340 USER’S MANUAL

MOTOROLA

5.7.3.9 SHIFT/ROTATE INSTRUCTIONS. The shift/rotate instruction table indicates the

number of clock periods needed for the processor to perform the specified operation on

the given addressing mode. Footnotes indicate when to account for the appropriate EA

times. The number of bits shifted does not affect the execution time, unless noted. The

total number of clock cycles is outside the parentheses. The numbers inside parentheses

(r/p/w) are included in the total clock cycle number. All timing data assumes two-clock

reads and writes.

Instruction

Head

Tail

Cycles

Note

LSd

Dn, Dm

−2

(0/1/0)

LSd

#, Dm

6(0/1/0)

—

LSd

〈FEA〉

6(0/1/1)

—

ASd

Dn, Dm

−2

(0/1/0)

ASd

#, Dm

6(0/1/0)

—

ASd

〈FEA〉

6(0/1/1)

—

ROd

Dn, Dm

−2

(0/1/0)

ROd

#, Dm

6(0/1/0)

—

ROd

〈FEA〉

6(0/1/1)

—

ROXd

Dn, Dm

−2

(0/1/0)

ROXd

#, Dm

−2

(0/1/0)

ROXd

〈FEA〉

6(0/1/1)

—

d = Direction (left or right)

NOTES:

1. Head and cycle times can be derived from the following table or calculated as follows:

Max (3

+ (n/4) + mod(n,4) + mod (((n/4) + mod (n,4) + 1,2), 6)

2. Head and cycle times are calculated as follows: (count

≤ 63): max (3 + n + mod (n + 1,2), 6).

3. Head and cycle times are calculated as follows: (count

≤ 8): max (2 + n + mod (n,2), 6).

Clocks

Shift Counts

012345689

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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