P87LPC778FDH datasheet(51/79 Pages) PHILIPS

51 / 79 page

Philips Semiconductors

P87LPC778

CMOS single-chip 8-bit microcontroller

Product data

Rev. 01 — 31 March 2004

51 of 79

9397 750 12378

8.15.1

Mode 0

Serial data enters and exits through RxD. TxD outputs the shift clock. 8 bits are

transmitted or received, LSB ﬁrst. The baud rate is ﬁxed at 1

⁄

6 of the CPU clock

frequency.

8.15.2

Mode 1

10 bits are transmitted (through TxD) or received (through RxD): a start bit (logical 0),

8 data bits (LSB ﬁrst), and a stop bit (logical 1). When data is received, the stop bit is

stored in RB8 in Special Function Register SCON. The baud rate is variable and is

determined by the Timer1 overﬂow rate.

8.15.3

Mode 2

11 bits are transmitted (through TxD) or received (through RxD): start bit (logical 0), 8

data bits (LSB ﬁrst), a programmable 9th data bit, and a stop bit (logical 1). When

data is transmitted, the 9th data bit (TB8 in SCON) can be assigned the value of 0 or

1. Or, for example, the parity bit (P, in the PSW) could be moved into TB8. When data

is received, the 9th data bit goes into RB8 in Special Function Register SCON, while

the stop bit is ignored. The baud rate is programmable to either 1

⁄

16 or

⁄

32 of the CPU

clock frequency, as determined by the SMOD1 bit in PCON.

8.15.4

Mode 3

11 bits are transmitted (through TxD) or received (through RxD): a start bit (logical 0),

8 data bits (LSB ﬁrst), a programmable 9th data bit, and a stop bit (logical 1). In fact,

Mode 3 is the same as Mode 2 in all respects except baud rate. The baud rate in

Mode 3 is variable and is determined by the Timer1 overﬂow rate.

In all four modes, transmission is initiated by any instruction that uses SBUF as a

destination register. Reception is initiated in Mode 0 by the condition RI = 0 and

REN = 1. Reception is initiated in the other modes by the incoming start bit if

REN=1.

8.15.5

Serial port control register (SCON)

The serial port control and status register is the Special Function Register SCON,

shown in Tables 48 and 49. This register contains not only the mode selection bits,

but also the 9th data bit for transmit and receive (TB8 and RB8), and the serial port

interrupt bits (TI and RI).

The Framing Error bit (FE) allows detection of missing stop bits in the received data

stream. The FE bit shares the bit position SCON.7 with the SM0 bit. Which bit

appears in SCON at any particular time is determined by the SMOD0 bit in the PCON

Once set, the FE bit remains set until it is cleared by software. This allows detection

of framing errors for a group of characters without the need for monitoring it for every

character individually.

Table 48:

SCON - Serial port control register (address 98H) bit allocation

Bit addressable; Reset value: 00H

Bit

Symbol

FE/SM0

SM1

SM2

REN

TB8

RB8

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