P87LPC778FDH datasheet(18/79 Pages) PHILIPS

18 / 79 page

Philips Semiconductors

P87LPC778

CMOS single-chip 8-bit microcontroller

Product data

Rev. 01 — 31 March 2004

18 of 79

9397 750 12378

OEn

Output enable. When ‘1’, the comparator output is connected to

the CMPn pin if the comparator is enabled (CEn = 1). This output

is asynchronous to the CPU clock.

COn

Comparator output, synchronized to the CPU clock to allow

reading by software. Cleared when the comparator is disabled

(CEn = 0).

CMFn

Comparator interrupt ﬂag. This bit is set by hardware whenever the

comparator output COn changes state. This bit will cause a

hardware interrupt if enabled and of sufﬁcient priority. Cleared by

software and when the comparator is disabled (CEn = 0).

Table 10:

CMPn - Comparator control registers CMP1 and CMP2 (address ACh for

CMP1, ADh for CMP2) bit description…continued

Bit

Symbol

Description

Fig 6.

Comparator input and output connections

Comparator 1

CP1

CN1

(P0.4) CIN1A

(P0.3) CIN1B

(P0.5) CMPREF

VREF

OE1

Change Detect

CO1

CMF1

Interrupt

Change Detect

CMF2

Interrupt

002aaa617

CMP1 (P0.6)

Comparator 2

OE2

CO2

CMP2 (P0.0)

CP2

CN2

(P0.2) CIN2A

(P0.1) CIN2B

P87LPC778FDH 데이터시트(PDF) 18 Page - NXP Semiconductors

P87LPC778FDH 데이터시트(HTML) 18 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79

데이터시트 다운로드

링크 URL