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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ES9033 데이터시트(PDF) 46 Page - ESS Technology,Inc |
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ES9033 데이터시트(HTML) 46 Page - ESS Technology,Inc |
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46 / 103 page  a 0.3.1 ES9033 Datasheet Information ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 WWW.ESSTECH.COM 46 Register Listings System Registers Register 0: SYSTEM CONFIG Bits [7] [6] [5] [4] [3] [2] [1] [0] Default 1’b0 1’b0 1’b1 1’b1 1’b1 1’b1 1’b0 1’b0 Bits Mnemonic Description [7] SOFT_RESET Performs soft reset to digital core except for the PLL Registers 6] ENABLE_2X_MODE Enables 2x mode for 768k sample rate. • 1’b0: 2x mode disabled (default) • 1’b1: 2x mode enabled [5] ENABLE_ANALOG_DAC_CH2 Enables ch2 analog DAC. • 1’b0: Disabled • 1’b1: Enabled (default) [4] ENABLE_ANALOG_DAC_CH1 Enables ch1 analog DAC. • 1’b0: Disabled • 1’b1: Enabled (default) [3] ENABLE_NSMOD Enables nsmod clock. • 1’b0: Clock disabled • 1’b1: Clock enabled (default) [2] ENABLE_DAC Enables DAC interpolation path clock. • 1’b0: Clock disabled • 1’b1: Clock enabled (default) [1] AMP_MODE_REG Sets system mode. • 1’b0: Power Down (default) • 1’b1: HIFI [0] RESERVED NA |
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