TEST CONDITIONS

MIN

NOM

MAX

UNIT

IOH

High level output current

VCCO (2) = 5 V

-4

mA

VCCO = 3.3 V

-2

mA

VCCO = 2.5 V

-1

mA

VCCO = 1.8 V

-1

mA

IOL

Low level output current

VCCO = 5 V

4

mA

VCCO = 3.3 V

2

mA

VCCO = 2.5 V

1

mA

VCCO = 1.8 V

1

mA

DR

Data Rate

0

50

Mbps

TA

Ambient temperature

-40

25

125

°C

VIOWM

Functional Isolation Working

Voltage (REU-8)

AC Voltage (sine wave)

200

VRMS

DC Voltage

280

VDC

VIOWM

Functional Isolation Working

Voltage (SOIC-8)

AC Voltage (sine wave)

450

VRMS

DC Voltage

637

VDC

(1)

VCC1 and VCC2 can be set independent of one another

(2)

VCCI = Input-side VCC; VCCO = Output-side VCC

(3)

The channel outputs are in undetermined state when 1.89 V < VCC1, VCC2 < 2.25 V and 1.05 V < VCC1, VCC2 < 1.71 V

5.4 Thermal Information

THERMAL METRIC

(1)

ISO652x

UNIT

DFN (REU-8)

D (SOIC-8)

8 PINS

8 PINS

RθJA

Junction-to-ambient thermal resistance

143.4

104.6

°C/W

RθJC(top)

Junction-to-case (top) thermal resistance

70.0

48.9

°C/W

RθJB

Junction-to-board thermal resistance

78.3

52.9

°C/W

ψJT

Junction-to-top characterization parameter

4.2

7.9

°C/W

ψJB

Junction-to-board characterization parameter

77.7

52.1

°C/W

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

note.

5.5 Package Characteristics

PARAMETER

TEST CONDITIONS

VALUE

VALUE

UNIT

8-REU

8-D

CLR

External clearance(1)

Shortest pin to pin distance through air >2.2

>4

mm

CPG

External creepage(1)

Shortest pin to pin distance across the

package surface

>2.2

>4

mm

CTI

Comparative tracking index

IEC 60112; UL 746A

>400

>400

V

Material Group

According to IEC 60664-1

II

II

CIO

Capacitance, input to output(2)

VIO = 0.4 × sin (2 πft), f = 1 MHz

≅0.5

≅0.5

pF

RIO

Resistance, input to output(2)

TA = 25°C

>1012

>1012

Ω

(1)

Creepage and clearance requirements must be applied according to the specific equipment isolation standards of an application. Care

must be taken to maintain the creepage and clearance distance of a board design to verify that the mounting pads of the isolator on

the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become equal in certain cases.

Techniques such as inserting grooves, ribs, or both on a printed circuit board are used to help increase these specifications.

(2)

All pins on each side of the barrier tied together creating a two-pin device.

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SLLSFU0B – AUGUST 2023 – REVISED APRIL 2024

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