MC68HC908GR4MP datasheet(75/286 Pages) FREESCALE

75 / 286 page

Functional Description

MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7

Freescale Semiconductor

Calculate and verify the adequacy of the VCO programmed center-of-range frequency, fVRS. The

center-of-range frequency is the midpoint between the minimum and maximum frequencies

attainable by the PLL.

For proper operation,

10.

Verify the choice of P, R, N, E, and L by comparing fVCLK to fVRS and fVCLKDES. For proper

operation, fVCLK must be within the application’s tolerance of fVCLKDES, and fVRS must be as close

as possible to fVCLK.

NOTE

Exceeding the recommended maximum bus frequency or VCO frequency

can crash the MCU.

11.

Program the PLL registers accordingly:

In the PRE bits of the PLL control register (PCTL), program the binary equivalent of P.

In the VPR bits of the PLL control register (PCTL), program the binary equivalent of E.

In the PLL multiplier select register low (PMSL) and the PLL multiplier select register high

(PMSH), program the binary equivalent of N.

In the PLL VCO range select register (PMRS), program the binary coded equivalent of L.

In the PLL reference divider select register (PMDS), program the binary coded equivalent

of R.

Table 7-1 provides numeric examples (numbers are in hexadecimal notation):

Table 7-1. Numeric Example

fBUS

fRCLK

2.0 MHz

32.768 kHz

2.4576 MHz

32.768 kHz

12C

2.5 MHz

32.768 kHz

132

4.0 MHz

32.768 kHz

1E9

4.9152 MHz

32.768 kHz

258

5.0 MHz

32.768 kHz

263

7.3728 MHz

32.768 kHz

384

8.0 MHz

32.768 kHz

3D1

VRS

()f

NOM

VRS

VCLK

–

NOM

--------------------------

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