MC68HC908GR4MP datasheet(178/286 Pages) FREESCALE

178 / 286 page

Serial Communications Interface (SCI)

MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7

178

Freescale Semiconductor

ILIE — Idle Line Interrupt Enable Bit

This read/write bit enables the IDLE bit to generate SCI receiver CPU interrupt requests. Reset clears

the ILIE bit.

1 = IDLE enabled to generate CPU interrupt requests

0 = IDLE not enabled to generate CPU interrupt requests

TE — Transmitter Enable Bit

Setting this read/write bit begins the transmission by sending a preamble of 10 or 11 1s from the

transmit shift register to the PE2/TxD pin. If software clears the TE bit, the transmitter completes any

transmission in progress before the PE2/TxD returns to the idle condition (1). Clearing and then setting

TE during a transmission queues an idle character to be sent after the character currently being

transmitted. Reset clears the TE bit.

1 = Transmitter enabled

0 = Transmitter disabled

NOTE

Writing to the TE bit is not allowed when the enable SCI bit (ENSCI) is clear.

ENSCI is in SCI control register 1.

RE — Receiver Enable Bit

Setting this read/write bit enables the receiver. Clearing the RE bit disables the receiver but does not

affect receiver interrupt flag bits. Reset clears the RE bit.

1 = Receiver enabled

0 = Receiver disabled

NOTE

Writing to the RE bit is not allowed when the enable SCI bit (ENSCI) is

clear. ENSCI is in SCI control register 1.

RWU — Receiver Wakeup Bit

This read/write bit puts the receiver in a standby state during which receiver interrupts are disabled.

The WAKE bit in SCC1 determines whether an idle input or an address mark brings the receiver out

of the standby state and clears the RWU bit. Reset clears the RWU bit.

1 = Standby state

0 = Normal operation

SBK — Send Break Bit

Setting and then clearing this read/write bit transmits a break character followed by a 1. The 1 after

the break character guarantees recognition of a valid start bit. If SBK remains set, the transmitter

continuously transmits break characters with no 1s between them. Reset clears the SBK bit.

1 = Transmit break characters

0 = No break characters being transmitted

NOTE

Do not toggle the SBK bit immediately after setting the SCTE bit. Toggling

SBK before the preamble begins causes the SCI to send a break character

instead of a preamble.

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