XRT83VSH28IB datasheet(13/74 Pages) EXAR

13 / 74 page

PRELIMINARY

XRT83VSH28

REV. P1.0.0

8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT

PARALLEL MICROPROCESSOR INTERFACE

SIGNAL NAME

BGA

LEAD

TYPE

DESCRIPTION

HW/HOST

T10

Mode Control Input

This pin is used to select Host mode or Hardware mode. By default, the LIU is set in

Hardware mode. To use Host mode, this pin must be pulled "Low".

NOTE: Internally pulled “High” with a 50k

Ω resistor.

WR_R/W/EQC0

Write Input(R/W)/Equalizer Control Signal 0

Host Mode

This pin is used to communicate a Read or Write operation according to the which

microprocessor is chosen.

See the Microprocessor Section of this datasheet for

details.

Hardware Mode

EQC[4:0] are used to set the Receiver Gain, Receiver Impedance and the Transmit

Line Build Out. See

Table 19 for more details.

NOTE: Internally pulled “Low” with a 50k

Ω resistor.

RD_DS/EQC1

Read Input (Data Strobe)/Equalizer Control Signal 1

Host Mode

This pin is used to communicate a Read or Write operation according to the which

microprocessor is chosen.

See the Microprocessor Section of this datasheet for

details.

Hardware Mode

EQC[4:0] are used to set the Receiver Gain, Receiver Impedance and the Transmit

Line Build Out. See

Table 19 for more details.

NOTE: Internally pulled “Low” with a 50k

Ω resistor.

ALE/EQC2

Address Latch Input (Address Strobe)

Host Mode

This pin is used to latch the address contents into the internal registers within the LIU

device. See the Microprocessor Section of this datasheet for details.

Hardware Mode

EQC[4:0] are used to set the Receiver Gain, Receiver Impedance and the Transmit

Line Build Out. See

Table 19 for more details.

NOTE: Internally pulled “Low” with a 50k

Ω resistor.

CS/EQC3

Chip Select Input - Host mode:

Host Mode

This pin is used to initiate communication with the microprocessor interface. See the

Microprocessor Section of this datasheet for details.

Hardware Mode

EQC[4:0] are used to set the Receiver Gain, Receiver Impedance and the Transmit

Line Build Out. See

Table 19 for more details.

NOTE: Internally pulled “Low” with a 50k

Ω resistor.

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