PM8621 datasheet(89/184 Pages) PMC

89 / 184 page

NSE-8G™ Standard Product Data Sheet

Preliminary

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use

Document ID: PMC-2010850, Issue 1

Bit

Type

Function

Default

Bit 31

R/W

WRB

Bit 30

R/W

ACCMDE

Bit 29

Unused

Bit 28-24

R/W

PORTCFG[4:0]

Bit 23-21

Unused

Bit 20-16

R/W

PORTADDR[4:0]

Bit 15-14

Unused

Bit 13-0

R/W

WORDADDR [13:0]

Writing to this register with the WRB register bit set high initiates an indirect read from the

offline connection memory page. WORDADDR selects the offline connection memory page to

read from. There is a latency of 6 SYSCLK cycles from when this register is written to with the

WRB bit set high until when valid data appears on the Configuration Output register. Indirect

reads should be spaced at least 6 SYSCLK cycles apart to permit valid data to appear in the

Configuration Output register.

Writing to this register with the WRB register bit set low initiates an indirect write to the offline

connection memory page. WORDADDR selects the offline connection memory page to write to.

Indirect writes should be spaced at least 4 SYSCLK cycles apart to ensure the writes complete

successfully.

While page copy is in progress (UPDATEV register bit = ‘1’), writing to this register will NOT

cause data to be updated to/from the offline connection memory page.

While a page swap is pending (SWAPV register bit = ‘1’), writing to this register MAY cause

unpredictable results as data may be transferred while a page swap is occurring, causing data to

be updated to a different connection memory page from the intended.

WRB

The indirect access control bit selects between a write (0) or read (1) access to the offline

connection memory page.

ACCMDE

These bits indicate the access mode of the offline connection memory page.

0 : PORT transfer mode.

1 : WORD transfer mode.

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