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PPC440GP-3CC466C 데이터시트(PDF) 63 Page - Applied Micro Circuits Corporation |
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PPC440GP-3CC466C 데이터시트(HTML) 63 Page - Applied Micro Circuits Corporation |
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63 / 83 page ![]() 440GP – Power PC 440GP Embedded Processor AMCC 63 Revision 1.07 – October 4, 2007 Data Sheet TmrClk input frequency – 100 MHz TmrClk period 10 – ns TmrClk input high time 40% of nominal period 60% of nominal period ns TmrClk input low time 40% of nominal period 60% of nominal period ns Notes: 1. TOPB is the period in ns of the OPB clock. The internal OPB clock runs at 1/2the frequency of the PLB clock. The maxi- mum OPB clock frequency is 66.66 MHz. 2. When the PCI-X interface is used to support a legacy PCI interface, the maximum PCIXClk frequency is 66.66MHz. Peripheral Interface Clock Timings (Continued) Parameter Min Max Units Notes |
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