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MNSC140CORE 데이터시트(PDF) 58 Page - Freescale Semiconductor, Inc |
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MNSC140CORE 데이터시트(HTML) 58 Page - Freescale Semiconductor, Inc |
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58 / 88 page ![]() MSC8122 Technical Data, Rev. 13 2-24 Freescale Semiconductor Specifications 2.5.10.4 SMII Mode 2.5.11 GPIO Timing Table 2-26. SMII Mode Signal Timing No. Characteristics Min Max Unit 808 ETHSYNC_IN, ETHRXD to ETHCLOCK rising edge set-up time 1.0 — ns 809 ETHCLOCK rising edge to ETHSYNC_IN, ETHRXD hold time 1.0 — ns 810 ETHCLOCK rising edge to ETHSYNC, ETHTXD output delay • 1.1 V core. • 1.2 V core. 1.51 1.51 6.02 5.02 ns ns Notes: 1. Measured using a 5 pF load. 2. Measured using a 15 pF load. Figure 2-20. SMII Mode Signal Timing Table 2-27. GPIO Timing No. Characteristics Ref = CLKIN Ref = CLKOUT (1.2 V only) Unit Min Max Min Max 601 REFCLK edge to GPIO out valid (GPIO out delay time) — 6.1 — 6.9 ns 602 REFCLK edge to GPIO out not valid (GPIO out hold time) 1.1 — 1.3 — ns 603 REFCLK edge to high impedance on GPIO out — 5.4 — 6.2 ns 604 GPIO in valid to REFCLK edge (GPIO in set-up time) 3.5 — 3.7 — ns 605 REFCLK edge to GPIO in not valid (GPIO in hold time) 0.5 — 0.5 — ns Valid ETHCLOCK ETHSYNC_IN ETHRXD ETHSYNC ETHTXD Valid Valid 810 809 808 |
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