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WM8580 데이터시트(PDF) 15 Page - Wolfson Microelectronics plc |
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WM8580 데이터시트(HTML) 15 Page - Wolfson Microelectronics plc |
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15 / 97 page ![]() Production Data WM8580 w PD Rev 4.3 August 2007 15 CONTROL INTERFACE TIMING – 3-WIRE MODE Figure 4 SPI Compatible Control Interface Input Timing Test Conditions AVDD, PVDD = 5V,DVDD = 3.3V, AGND, PGND,DGND = 0V, TA = +25 oC, fs = 48kHz, MCLK and ADCMCLK = 256fs unless otherwise stated PARAMETER SYMBOL MIN TYP MAX UNIT SCLK rising edge to CSB rising edge tSCS 60 ns SCLK pulse cycle time tSCY 80 ns SCLK duty cycle 40/60 60/40 ns SDIN to SCLK set-up time tDSU 20 ns SDIN hold time from SCLK rising edge tDHO 20 ns SDO propagation delay from SCLK rising edge tDL 5 ns CSB pulse width high tCSH 20 ns CSB rising/falling to SCLK rising tCSS 20 ns SCLK glitch suppression tps 2 8 ns Table 6 3-Wire SPI Compatible Control Interface Input Timing Information CSB SCLK SDIN t DHO t DSU t CSH tSCY t SCS LSB t CSS SDO t DL LSB t CSS |
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