TMP93CS41 datasheet(156/248 Pages) TOSHIBA

156 / 248 page

TMP93CS40/TMP93CS41

2004-02-10

93CS40-154

3.10 Stepping Motor Control/Pattern Generation Port

The TMP93CS40/TMP93CS41 contains two 4-bit hardware stepping motor control/pattern

generation channels, PG0 and PG1, (hereinafter called PG) which actuate in synchronization

with the (8-bit/16-bit) timers. PG (PG0 and PG1) shares the 8-bit input/output port with P6.

The output on channel 0 (PG0) is updated in synchronization with the 8-bit timer 0, 8-bit

timer 1, or 16-bit timer 4. The output on channel 1 (PG1) is updated in synchronization with the

8-bit timer 0, the 8-bit timer 1, or the 16-bit timer 5.

The PG ports are controlled by the control register (PG01CR) and can select either stepping

motor control mode or pattern generation mode. Each bit of P6 can be used for a PG port.

PG0 and PG1 can be used independently.

Since the two PG channels operate in the same manner, except for the following points, only

the operation of PG0 will be explained below.

Differences between PG0 and PG1

PG0

PG1

Trigger signal

from timer 4

from timer 5

Figure 3.10.1 PG Block Diagram

1/2 excitation

1-2 excitation

SA03

PG03

PG02

P62/PG02

(P66/PG12)

P63/PG03

(P67/PG13)

P61/PG01

(P65/PG11)

SA01

PG01

SA02

P60/PG00

(P64/PG10)

PG00

SA00

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